About BlaizeBlaize has developed a suite of purpose-built, full-stack programmable processor architecture and a low-code/no-code software platform that enables AI processing solutions for high-performance computing in multiple large and rapidly growing markets. Our proprietary solutions enable enterprises to harness the power of AI at the periphery of the network and in the data center and deliver real-time insights and decision-making capabilities with speed and efficiency. Our comprehensive partner ecosystem delivers turn-key solutions based on and complementing our technologies, such as cloud service providers, independent software vendors, aggregators, industrial personal computer vendors, and others. Blaize has raised $224 million from strategic investors such as DENSO, Mercedes Benz, Magna, and Samsung, financial investors such as Franklin Templeton, Temasek, GGV, and Bess Ventures, and globally-renowned operators such as Dado Banatao, Jürgen Hambrecht, Dr. Paul Achleitner, Dr. Gerhard Roiss, and Dr. Kurt Lauk. Headquartered in El Dorado Hills (CA), Blaize has more than 200 employees worldwide with teams in San Jose (CA), Cary (NC), and subsidiaries in Hyderabad (India), Leeds, and Kings Langley (UK), and Abu Dhabi (UAE).DESCRIPTIONWe work on complex high performance, fully programmable, low power design of Graph Streaming Processor, an architecture specially designed for machine learning/visual applications. As a member of our focused group of HW engineering, the candidate will be involved in designing a stream processor and memory subsystem working on every aspect of hardware design and will be involved in close interactions with both SDK and backend teams for performance tuning, area, and power optimizations of multi million gate design.EDUCATION AND EXPERIENCEBE/BTech/ME/MTech in Computer Science or Electronics or ElectricalMasters/ Bachelors in EE/EC/CS with 10+ years of experience in IP/SoC/ASIC Verification.Should have experience in managing the teams for at least 3 years.REQUIRED KNOWLEDGE, SKILLS, AND ABILITIESLeadership skills demonstrated as a part of the team.Should have extensively worked on x86 or any other complex architecture.Should have extensive knowledge in ULT development using UVM/SV, assembly programming and parallel programming.Leading, managing, and developing a team of verification engineers by applying talent development and people management skills to create a motivated high-performance team.Being a technical expert in overseeing a team that specializes in state-of-the-art simulation, emulation,and verification techniques.Reviewing and creating test plans Full-chip functional verification on Blaize processor and Test BenchDevelopment in System Verilog targeting complete functionality coverageFinding cost-effective and innovative verification and automation techniques and driving the team to implement them on new devices.Should be able to come up with test plans along with estimates and risksUnderstanding the processor architecture is a must.Strategic planning to meet the organization's goals and to use resources optimally.Knowledge of Computer architectureExperience in AMBA AXI, AHB, and APB protocolsExcellent Test Bench development, debugging and problem-solving skills.Knowledge on Memory subsystemADDITIONAL SKILLS:Knowledge on emulators like Palladium, Zebu a plusKnowledge on FPGA Prototyping is a plus.Knowledge in Automotive ISO 26262 Functional Safety Standard is a plus.Understanding of GPU/AI/ML Processor architectureLOCATION Hyderabad, IndiaBlaize is an equal opportunity employer. We pride ourselves on having a diverse workforce and we do not discriminate against any employee or applicant because of race, creed, color, religion, gender, sexual orientation, gender identity/expression, national origin, disability, age, genetic information, veteran status, marital status, pregnancy or related condition, or any other basis protected by law. We respect the gender, gender identity and gender expression of our applicants and employees, and we honor requests for preferred pronouns. It is our policy to comply with all applicable national, state and local laws pertaining to nondiscrimination and equal opportunity.
