Layout Mask Design Design, Implement and Drive Layout edits needed for development, yield improvement, quality and process enablement. Run (DFM) Flows and collaborate with Design & Technology Development and to craft and implement solutions. Design Library Management & Tapeout Build, Validate and Handle New Design Libraries and Final archives. Accountable for Final EDA checks (LVS, DRC, LVL) Generate Final Data and manage post-processing tapeout flows and Validate final mask data Lead Tapeout order paperwork and Coordinate with Partner Teams to ensure alignment of needs, expectations, priorities and resources to hit schedules. You believe in driving continuous improvement. You are an Engineer who is passionate about learning new things as well as creating and innovating. You are tenacious and motivated by new challenges. Strong understanding of Semiconductor Physics and VLSI techniques Strong Communication skills in written and spoken English Exposure to EDA Tools
