Design Verification Engineer

• Develop and execute comprehensive verification plans and testbenches using industry-standard methodologies.
• Implement test cases and automate verification processes to improve efficiency.
• Analyze verification results, identify issues, and collaborate with design teams to resolve defects effectively.
• Maintain verification documentation, including test reports and coverage analysis.
• Participate in design reviews to provide feedback on testability and implementation.
• Ensure compliance with project schedules and quality standards.

• Strong proficiency with SystemVerilog and UVM verification methodology.
• Solid understanding of digital design concepts and hardware description languages like Verilog or VHDL.
• Experience with simulation and debugging tools such as Synopsys VCS, Cadence Xcelium, or Questa.
• Familiarity with scripting languages like Python or Tcl for automation purposes.
• Good knowledge of verification techniques including constrained-random testing, coverage-driven verification, and assertions.

• Bachelor's or Master’s degree in Electrical Engineering, Computer Engineering, or related fields.
• Proven experience as a Design Verification Engineer or similar role in semiconductor or electronics industry.
• Strong problem-solving skills with attention to detail.
• Excellent communication and teamwork abilities.

• Private Health Insurance
• Pension Plan
• Paid Time Off
• Work From Home

Erbity Private Limited