Master's or PhD degree in Applied Mechanics, Materials Science, Mechanical Engineering, or any related fields of engineering and physics. Possess 5+ years of strong Semiconductor process integration experience, driving structure specs, yield pareto issues for a product with hands-on (beginner level) experience in 3D semiconductor structure model building tools like Synopsys, Cadence, Mentor, and Silvaco. Understanding of analysis techniques like TEM/SEM/TDS and metrology techniques like Ellipsometry/WIS/Image based defect analysis. Experience with data analysis tools and machine learning frameworks (e.g., Python, MATLAB, TensorFlow). Experience with HPC on Linux environment Experience with computational geometry and mesh generation techniques is an added advantage. Excellent problem-solving skills and attention to detail. Ability to work independently and collaboratively in a fast-paced environment. Excellent written and verbal communication Experience with reports and presentations customized for users, managers and leaders Outstanding teamwork and experience with remote collaboration tools
