Foundry Services, Power Performance Area Design Engineer
Intel
Bangalore, Karnataka
Training
Full-time
14 days ago
Job Description Intel Foundry is a systems foundry dedicated to transforming the global semiconductor industry by delivering cutting-edge silicon process and packaging technology leadership for the AI era. With a focus on scalability, AI advancement, and shaping the future, we provide an unparalleled blend of an industry-leading technology, a rich IP portfolio, a world-class design ecosystem, and an operationally resilient global manufacturing supply chain. As stewards of Moore's Law, we persistently innovate and foster collaboration within an extensive partner ecosystem to advance technologies and enable our customers to design leadership products. Our strategic investments in geographically diverse manufacturing capacities bolster the resilience of the semiconductor supply chain, particularly for advanced products. Leveraging our technological prowess, expansive manufacturing scale, and a more sustainable supply chain, Intel Foundry empowers the world to deliver essential computing, server, mobile, networking, and automotive systems for the AI era. This position is part of Foundry Services within Intel Foundry. Foundry Services is a customer-oriented service organization. This business unit is completely dedicated to the success of its customers with full P and L responsibilities. This model will ensure that our foundry customers' products will receive our utmost focus in terms of service, technology enablement and capacity commitments. We are looking for a PPA Engineer who wants to work in a growin g, new business working on cutting edge technology. The person in this position must be able to juggle multiple priorities and adapt to changing business needs. Responsibilities may include but not be limited to: Compare and objectively benchmark PPA of IFS technology nodes against competition offerings to guide IFS technology teams to target market segments that aligns with technology strengths. Supporting RTL synthesis and place and route experiments using internal and external vendor tools to evaluate Intel's product Power, Performance, and Area, for existing and future process nodes on internal Intel Architecture and external ARM IP's and put it in perspective of what IFS customer needs. Evaluate the impact of floorplan changes, corresponding scaling and its impact to power, performance, debug scaling and timing issues for the present tech node and predict how it would impact scaling, timing, and power for the next tech node, improve cell utilization and transistor density metrics and keep pushing the power, performance envelope through critical path analysis, metal layer usage by the tool, etc. Drive software solutions in providing tools, API's, and methodologies to help hardware design teams co-optimize their designs for leading edge process nodes. Build services and APIs to allow efficient and safe access to the ML algorithms which will enable the creation of visualizations to help customers analyze their results to achieve their desired outcomes. The chosen candidate will also have the following skills in addition to the qualifications listed below: Excellent communication and collaboration skills. Tolerance for ambiguity in a growing new business. Interested in problem-solving and collaborating with others. Qualifications Bachelor's degree in electrical engineering, Computer Engineering, Computer Science, Math or in a related field of study 6+ years of related experience OR a master's degree in electrical engineering, Computer Engineering, Computer Science, Math or in a related field of study 3+ years of related experience OR PHD in Electrical Engineering, Computer Engineering, Computer Science, or in a related field of study and 1+ years of experience. 6+ years' experience creating new methodologies to improving PPA using industry standard physical implementation tools and associated flows. 3+ years of hands-on experience using industry standard implementation tools for synthesis, floor planning, place and route, and ECO. 1+ years of experience with scripting languages such as Perl, Python, and/or Tcl etc. How to Stand out (Preferred Qualifications): Post graduate degree Electrical Engineering, Computer Engineering, Computer Science, or in a related field of study. Experience running design technology co-optimization (DTCO) and PPA experiments for comparing various technology options. Deep understanding of standard cell architecture and design for PPA optimization. Understanding of physical design algorithms with focus on out of the box PPA improvement. Deep understanding of device physics, standard cell architecture and design, and circuits. Ability to run Spice simulations and/or transistor level STA. Experience with HDL. Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research. Inside this Business Group Intel Foundry is a systems foundry dedicated to transforming the global semiconductor industry by delivering cutting-edge silicon process and packaging technology leadership for the AI era. With a focus on scalability, AI advancement, and shaping the future, we provide an unparalleled blend of an industry-leading technology, a rich IP portfolio, a world-class design ecosystem, and an operationally resilient global manufacturing supply chain. As stewards of Moore's Law, we persistently innovate and foster collaboration within an extensive partner ecosystem to advance technologies and enable our customers to design leadership products. Our strategic investments in geographically diverse manufacturing capacities bolster the resilience of the semiconductor supply chain, particularly for advanced products. Leveraging our technological prowess, expansive manufacturing scale, and a more sustainable supply chain, Intel Foundry empowers the world to deliver essential computing, server, mobile, networking, and automotive systems for the AI era. This position is part of Foundry Services within Intel Foundry. Foundry Services is a customer-oriented service organization. This business unit is completely dedicated to the success of its customers with full P&L responsibilities. This model will ensure that our foundry customers' products will receive our utmost focus in terms of service, technology enablement and capacity commitments. Posting Statement All qualified applicants will receive consideration for employm ent without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Benefits We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits It has come to our notice that some people have received fake job interview letters ostensibly issued by Intel, inviting them to attend interviews in Intel's offices for various positions and further requiring them to deposit money to be eligible for the interviews. We wish to bring to your notice that these letters are not issued by Intel or any of its authorized representatives. Hiring at Intel is based purely on merit and Intel does not ask or require candidates to deposit any money. We would urge people interested in working for Intel, to apply directly at https://jobs.intel.com/ and not fall prey to unscrupulous elements. Working Model This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.
