
MTS Silicon Design Engineer
- Bangalore, Karnataka
- Permanent
- Full-time
Experience or exposure to Verilog, System Verilog, Object Oriented Programming/C++, Perl, and logic simulation is a requirement
Experience or exposure to UVM/OVM is a must.
Must demonstrate strong Object Oriented programing skills and concepts.
Experience with memory controllers, dfi, dram memory models(ddr4/5, lpddr4/5, hbm, NVDIMM) and/or ddr phys is a plus
Requires strong communication skills and the ability to work independently as well as in a cross-site team environment.KEY RESPONSIBILITIES:
- Work with all stakeholders such as design architect and block designer to understand features to be verified. Follow the process and good practices to develop UVC and testbench for design verification.
- Experience with memory controllers, dfi, dram memory models(ddr4/5, lpddr4/5, hbm, NVDIMM) and/or ddr phys is added advantage
- ASIC design verification experience with 7+Years
- Hands on experience in developing complex UVC
- Good debugging skill and good knowledge of verification tool and methodology
- Hands on experience with coverage planning, coding, and coverage closure
- Should have worked on developing testplan at module level/IP level /Chip-level project
- Mentoring Juniors and ensuring that the team achieves technical goals with high quality.
- B.E/B.Tech in ECE, Electrical engineering degree or Master’s degree preferred with emphasis in Electrical/Electronics Engineering. Preferred VLSI major in post-graduation
- #LI-SR5