
Senior Staff Engineer, Design Verification
- Pune, Maharashtra
- Permanent
- Full-time
- Interpreting architectural and design requirements;
- Writing verification test plans and requirements;
- Developing and using complex test benches;
- Implementing directed and constrained random test cases;
- Collecting, analyzing, and enhancing functional and code coverage;
- Debugging issues in the requirements, tools, simulation environment, test cases, and DUT;
- Performing Object Oriented programming (System Verilog and C++);
- Participating in System Verilog Verification using a framework such as UVM or other industry standard methodologies;
- Verification automation and scripting using Perl/Shell/Python .