Digital Design Engineer
NXP Semiconductors View all jobs
- Pune, Maharashtra
- Permanent
- Full-time
- Working knowledge of UVM is a desirable
- Good knowledge of System-Verilog assertions, checkers and other design verification techniques are a plus
- Working experience of Unified Power Format for simulation, synthesis and CLP checking is a plus
- Good knowledge of scripting languages. Perl and Python are plusses.