Senior Principal SoC Design Engineer

• Define and drive SoC architecture, including CPU subsystems, interconnects, and memory hierarchy.
• Hands-on design work: RTL coding, debugging, and design reviews.
• Lead RTL design, verification, and synthesis for complex SoCs.
• Collaborate with cross-functional teams for hardware/software integration.
• Mentor technical teams and guide design best practices.
• Ensure PPA optimization and compliance with industry standards.

• Experience: 15+ years in SoC design and architecture with successful tape-outs of multiple SoCs.
• Technical Skills:

• Strong expertise in ARM-based microcontrollers and SoC integration.
• Proficiency in RTL (Verilog/SystemVerilog), synthesis, timing closure.
• Comfortable working with Synthesis/STA/Physical Design/Package teams during SoC design
• Familiarity with EDA tools (Synopsys, Cadence).
• Deep knowledge of low-power design techniques.
• Experience with multiple interfaces: SPI, I²C, UART, USB, PCIe, Ethernet, CAN, eSPI.
• Knowledge of Flash memory integration.
• Additional experience with cryptographic accelerators or security IPs.
• Familiarity with common Analog IPs used in microcontroller design (e.g., ADC, DAC, PLLs, LDOs).
• Soft Skills:

• Comfortable working in a fast-paced environment.
• Strong team player with excellent communication skills.

• Education: Bachelors or Master’s in Microelectronics, Electronics, Electrical Engineering

NXP Semiconductors