As a leading technology innovator, Qualcomm pushes the boundaries of whats possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements Minimum Qualifications: Bachelors degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Masters degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Educational Requirements Bachelor/masters Degree in Electronics & Communication / Micro Electronics Job Description Micro-Arch, RTL Design ownership of SMMU IP for the next generation System-on-chip (SoC) for smartphones, tablets, and other product categories System Memory Management Unit (SMMU) does virtual to physical address translation, dynamic allocation, and access control of DDR memory, designed as per ARM SMMU architecture spec Job responsibilities include Work with Hardware and Software teams to understand the design requirements, specification, and interface details for SMMU IP Develop micro arch design specification optimized for performance, area, power, Software use cases Implement design spec in RTL coding language, qualify code through all required quality checks like Lint, CDC, Synthesis/DFT/low power checks Work with SoC level performance modeling team on latency, bandwidth analysis, fine tune HW configuration like cache, buffer sizing Debug and root cause post silicon issues in collaboration with emulation, software test teams Required skillset includes VLSI logic design expertise ARM system architecture, Memory Management, Virtual Memory concepts, Core sight architecture, power management fundamentals Knowledgeable about on-chip interconnect protocols like APB/AHB/AXI/ACE/ACE-Lite Strong debugging, Analytical and problem-solving skills Good understanding of the ASIC design convergence cycle in terms of architecture, micro-architecture, synthesis, timing closure and verification Communication and collaboration skills to work with a large world-wide design organization Additional Job Description Desired skillset includes Experience in designs optimized for low power - Dynamic clock gating, Logic/ Memory power collapse Proficiency in Scripting languages (Python or Perl) for Automation initiatives, C/C++/SystemC for performance models Working knowledge of Synthesis, DFT, LEC, functional cover points/assertions, formal verification
