DFT Senior Engineer

Hyderabad, Telangana
Permanent
Full-time

1 month ago

Job Description:Experience: 5 +- Should have worked hands-on Full chip DFT implementation, Scan, DRCs, ATPG generation & Simulations along with Pattern Porting/re-targeting and Coverage improvement-Experience with Scan, Compression, ATPG and simulations with Synopsys EDA tools.
- Should have participated in successful tape-outs of SoC/ASIC chips at 3nm or below and achieved test targets.
- Descent understanding of front-end SoC/ASIC design and implementation including Synthesis and STA.
-Develop/automate flows and scripts in Perl/Tcl to enhance the DFT methodologies & process-Excellent problem solving and debugging skills. Proactive in nature- Excellent Customer interaction, Communication and Team work skillsDepartment:Semicon (India) AssociateSkills Required:Scan Insertion,Memory Built-In Self Test (MBIST),DFT,Automatic Test Pattern Generation (ATPG),Cadence ToolsYears Of Exp:5 to 10 YearsDesirable Skills:Scan Insertion,Memory Built-In Self Test (MBIST),DFT,Automatic Test Pattern Generation (ATPG),Cadence ToolsDesignation:Associate

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