Associate II - VLSI

UST

  • Bangalore, Karnataka
  • Permanent
  • Full-time
  • 18 days ago
Job Description:Role Proficiency:Execute any internal project or small tasks of customer project in any field of VLSI Frontend Backend or Analog design under minimal supervison from the LeadOutcomes: * As an Individual contributor work on any one task of RTL Design/Module in Verification/PD/DFT/Circuit Design/Analog Layout/STA/Synthesis/Design Checks/Signoff etc.
  • Analyse and complete the assigned task in the defined domain(s) successfully on-time with minimal support from senior engineers
  • Ensure quality delivery as approved by the senior engineer or project lead
Measures of Outcomes: * Quality –verified using relevant metrics by Lead/Manager
  • Timely delivery - verified using relevant metrics by Lead/Manager
  • Reduction in cycle time and cost using innovative approaches
  • Number of trainings attended
Outputs Expected:Quality of the deliverables: * Clean delivery of the module in-terms of ease in integration at the top level
  • Ensure functional spec / design guidelines are met 100% of the time without deviation or limitation
  • Documentation of the tasks and work performed
Timely delivery: * Meet project timelines as given by the team lead/program manager
  • Help with intermediate tasks delivery by other team members to ensure progress
Teamwork: * Teamwork participation; supporting team members in the time of need
  • Able to perform additional tasks in case of any team member(s) is not available
Innovation & Creativity: * Pro-actively plan approach towards repeated work by automating tasks to save design cycle time
  • Participation in technical discussion
training
forumSkill Examples: * Languages and Programming skills:a. System Verilog Verilog VHDL UVM C C++ Assembly Perl TCL/TK Makefile Spice (any one)
  • EDA Tools: a. Cadence Synopsys Mentor tool sets (one or more)b. Simulators Lint CDC/RDC DC/RTL-C ICC/Innovus/Olympus ETS/TK/FS PT/Tempus Calibre etc. (any one)
  • Technical Knowledge: (any one)a. Understands IP Spec Architecture Design Micro Architecture Functional Spec Test Plan Verificationb. Knows Bus Protocol AHB/AXI/PCIe/USB/Ethernet/SPI/I2C Microprocessor architecturec. Good knowledge of Physical Design / Circuit Design / Analog Layout d. Good understanding of Synthesis DFT Floorplan Clocks P&R STA Extraction Physical Verificatione. Knowledge in Soft / Hard / Mixed Signal IP Design Processor Hardening FPGA Design
  • Technology: CMOS FinFet FDSOI - 28nm / 22nm / 16ff / 10nm and below
  • Required technical skills and prior design knowledge to execute assigned tasks
  • Ability to learn new skills in case required technical skills are not present to a level needed to execute the project
  • Able to deliver tasks with quality and 100% on-time per quality guidelines and GANTT
  • Strong communication skills
  • Good analytical reasoning and problem-solving skills with attention to detail
Knowledge Examples:
  • Previous project experience in any of the design by executing any one of the following RTL Design / Verification / DFT / Physical Design / STA / PV / Circuit Design / Analog Layout etc.
  • Good Understanding of the design flow and methodologies used in designing
  • Understand the assigned tasks and have sufficient knowledge to execute the project tasks assigned by the client / manager per skill set
Additional Comments:Memory Layout Hands on experience with layouts of important memory building blocks like control, sense amplifiers, I/O Blocks, bit cell array and decoders etc in compiler context. Should have worked on 16nm / 14nm / 10nm/ 7nm/ Finfet process technologies . Hands on experience with top level memory integration and DRC, LVS, Density verification and cleaning physicals across the compiler space. Good handle on IR/EM related issues in memory layouts. Must have worked on cadence tools for layout design and Cadence/Mentor/Synopsys tools for physical verification checks. Strong knowledge of ultra-deep sub-micron layout design related challenges and good understanding of DFM guidelines. Experience & or strong interest in memory compilers developed. Excellent and demonstrated team player with ability to work with external customers and in cross functional teamsSkills:Memory Layout,Decoder,CompilersAbout Company:UST is a global digital transformation solutions provider. For more than 20 years, UST has worked side by side with the world’s best companies to make a real impact through transformation. Powered by technology, inspired by people and led by purpose, UST partners with their clients from design to operation. With deep domain expertise and a future-proof philosophy, UST embeds innovation and agility into their clients’ organizations. With over 30,000 employees in 30 countries, UST builds for boundless impact—touching billions of lives in the process.

UST

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