
DFT - Staff Engineer
- Bangalore, Karnataka
- Permanent
- Full-time
- RTL DFT Instruments Insertion, ATPG and DFT Verification (scan and MBIST) ownership of complex leading-edge SOC blocks
- Continuous improvement of existing DFT Flow and to work on DFT methodologies that reduce test cost, increase product quality, and enhance yield
- In depth understanding and hands on experience on
- Scan Compression technology, setting up ATPG for flat and hierarchical designs from scratch, performing timing and notiming simulations of scan patterns and debug.
- Understanding of Memory BIST and verification (timing and notiming) and debug
- In depth understanding of IEEE 1687 (IJTAG) and IEEE 1149.1/6 (Boundary Scan) standards and verification
- Verilog RTL Constructs
- TCL, Python scripting
- Coverage Analysis
- Excellent oral and written communications skills
- Excellent team player
- Experience with Siemens Tessent and Cadence Xcelium tools
- Memory repair verification experience
- Work with the Test Engineer to bring up ATPG and MBIST patterns on the ATE
- Experience in Silicon diagnosis of scan and mbist patterns
- SDC understanding and DFT Lint, Synthesis DFT reports Analysis
- Good understanding of DFT implementation on Backend flow