Analog/IC Layout Manager Experience : 7-16 Years Location : Hyderabad Company : A leading semiconductor company As an Analog/IC Layout Manager, you will work with an exceptionally talented, passionate core team based in India, lead the team to design IC layout, collaborating with peer teams, to meet scheduled milestones in a multiple projects-based environment. Responsibilities Provide leadership in building and growing a Custom layout team from the ground up to support the company's global DRAM layout requirement; Provide leadership in developing Analog and custom layout to meet schedule and milestone; Provide leadership in training the team's technical skills and cultural healthiness. Effectively communicating with engineering teams across multiple country to assure the success of the layout project. Organize, prioritize, and manage logistic on tasks and resource allocations for multiple projects. Manage performance and development of team members. Managing hiring and retention. As a critical member of the core DRAM leadership team in India, contribute to the overall success of the company's DRAM India operation Qualification/Requirements 12 + year experience in analog/custom layout in advanced CMOS process. Minimum 2+ years people management experience. Expertise in Cadence VLE/VXL and Mentor Graphic Calibre DRC/LVS is a must. Must have strong skills in layout and floor planning skills and manual routing. Strong ability to build, and continuously develop a premier analog/mixed-signal layout team Experienced in managing multiple Custom IC layout projects Highly motivated with passion, detail oriented, systematic and methodical approach in IC layout design. The ability to work and communicate effectively in a team and to be able to multi-task effectively in a fast-paced working environment. Excellent verbal and written communication skills required. Independent with strong analytical skills, creative thinking and self-motivated. Capable of working in a cross functional, multi-site team environment in multiple time zones. Previous work experience in DRAM/NAND layout design is desirable however not mandatory. Education BE or MTech in Electronic/VLSI Engineering.