Drive vertical integration with a network of collaborators varying from Business Units, Pathfinding, Design, Process, Integration, Reliability, Product Engineering, Probe, Test, Assembly, mask tech, etc. Drive node health tracking, communication and documentation of key achievements delivery starting from project kick off till product qual. Ensure all node enabling teams have responsible owner for each node Collaborate with responsible owner to populate crystal clear specifications in the database Publish score cards of work from accountable owner in the health report Create timeline charts to provide clear visibility of project timelines and relative dependencies across node enabling teams Champion test structure definition for all designs within a node starting from test chip to final production design Aim for high quality proliferation of test structures from test chip to product designs. Responsible for requesting TCAD, structure, OPC, electrical and Reliability simulations Ensure all test structures are validated on silicon and are readily available for product debug Minimum of 8+ years of experience in semiconductor industry in the areas Process Integration, Product Engineering, Test Structure Development, or Unit Process Development Project management experience with highly collaborative personality Proven track record of coordinating high level roll up meetings Proven track record to think and communicate clearly in urgent and stressed situations In depth understanding of the 3D NAND process flow is a plus
