
Signal Integrity Lead
- Bangalore, Karnataka
- Permanent
- Full-time
- Drive SI design, simulation, and validation for next-gen high-speed interconnects (112G/224G PAM4, PCIe Gen6/7, Co-Packaged, and Near Package) through the product development cycle.
- Conducting SI COE analysis, including
- Performing signal integrity simulations and analysis for high-speed interconnect product development. This includes determining the correct simulation methodology and setup to use, as well as a good understanding of the criteria for each interface.
- Modeling the connector with the consideration of manufacture impact and application impact.
- Providing solutions to the SI challenges. This includes identifying the problems, making research plans, developing new technologies, and training and sharing the findings with the SI community.
- Develop novel interconnect solutions by optimizing mating interfaces, lead frames, and PCB transitions for resonance-free, low-loss performance.
- Enhance bulk cable design & termination techniques to minimize skew, impedance mismatches, and signal degradation.
- Advance high-frequency testing methodologies beyond 67 GHz with innovative non-PCB-based test fixtures.
- Utilize AI & big data analytics for predictive SI modeling, auto-routing, and performance optimization.
- Optimize material selection & electromagnetic design to improve noise isolation, signal integrity, and high-frequency response.
- Collaborate with NPD teams & industry partners to influence SI strategies, technology roadmaps, and next-gen product designs.
- Represent TE at industry forums (IEEE, OIF, PCI-SIG, etc.) and contribute to next-gen SI standards.