Design For Testability

• Proficiency with Tessent, DFTMAX, and ATE Testing is mandatory for this role as they are key tools used in optimizing testability features.
• Familiarity with boundary scan techniques to efficiently identify faults in assembled circuit boards.
• Experience in scan insertion to facilitate the testing of digital circuits by embedding test patterns.
• Knowledge of JTAG standards to ensure inter-operability and ease of design testing processes.
• Expertise in EDT (Embedded Deterministic Test) for achieving high test coverage with reduced test data volume.
• Ability to perform fault coverage analysis to measure and improve the effectiveness of test patterns.
• Strong analytical skills with the ability to diagnose complex digital design issues quickly and effectively.
• Excellent communication skills to collaborate effectively with cross-functional teams and articulate technical information clearly.

• Develop and implement test strategies aimed at improving design testability and diagnostic capabilities.
• Collaborate with design engineers to integrate DFT features into projects during the early design phases.
• Execute DFT analysis and generate detailed reports on test coverage and efficiency.
• Work on reducing the test cost by optimizing test patterns and minimizing test time.
• Ensure compliance with industry standards and best practices for DFT and test methodologies.
• Maintain and improve existing test infrastructures and processes to enhance product quality.
• Assist in troubleshooting complex test issues and recommend corrective actions and solutions.
• Contribute to the continuous improvement of testing processes through innovation and creative problem-solving.

Expertia AI Technologies