SoC Design/Integration Engineer, Silicon, Google Cloud

Google

Bangalore, Karnataka
Permanent
Full-time

10 days ago

Minimum qualifications:

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.

4 years of experience in ASIC development with Verilog/SystemVerilog, VHDL, or Chisel.
Experience in ASIC design verification, synthesis, timing/power analysis, and Design for Testing (DFT).

Experience in one or more SoC integration domains and flows (e.g., clocking, debug, fabrics, security, or low power methodologies).

Preferred qualifications:

Experience with scripting languages (e.g., Python or Perl).

Experience in SoC designs and integration flows.

Knowledge of bus architectures, processor design, accelerators, or memory hierarchies.

Knowledge of high performance and low power design techniques.

About the jobBe part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.The ML, Systems, & Cloud AI (MSCA) organization at Google designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all Google services (Search, YouTube, etc.) and Google Cloud. Our end users are Googlers, Cloud customers and the billions of people who use Google services around the world.We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including Google Cloud’s Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.Responsibilities

Own microarchitecture, implementation, and integration of SoC Chassis and subsystems.
Perform quality check flows (e.g., Lint, CDC, RDC, VCLP).
Drive design methodology, libraries, debug, code review in coordination with other IPs Design Verification (DV) teams and physical design teams.
Identify and drive power, performance, and area improvements for the domains owned.

Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also and If you have a disability or special need that requires accommodation, please let us know by completing our .

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