Job Description Delivers power integrity solutions for large, complex highspeed platforms, boards, packages, and silicon. Develops and analyzes power delivery networks including 2D and 3D model extraction and noise analysis across die/C4 bumps, silicon, package, sockets, and boards. Defines power grid specification and power and area targets to achieve the best balance of power integrity and performance. Develops test structures, electrical analysis methodology and verification plans to address challenges. Performs measurements to characterize power noise profile across frequency, ground bounce, and other key metrics to verify power delivery network after design and correlate back to presilicon analysis/estimations. Applies knowledge of power integrity design and tradeoffs to perform simulations of power network, guide package, and platform physical implementation. Ensures that ondie power noise meets SoC and other key platform ingredient functionality and performance. Develops and delivers platformlevel power shapes and decoupling solutions as part of the platform design guide to the end customers. Derives platform level specifications from silicon specifications, ensures package/platform pathfinding to converge on feature set/form factor, and VR performance characterization. Collaborates with the silicon integration team, die floor planners, and package design team to optimize the ondie decoupling partitions and implement the package decoupling scheme and voltage regulation for package/die. Qualifications Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Minimum Qualifications: Bachelor's or Master's Degree in Electrical Engineering with 10+ years of relevant industry experience or PhD in Electrical Engineering with 8-10 years of relevant experience. Minimum 10 years' experience with each of the below skill sets: o Proven experiences on package and board level power integrity o Experience with power integrity modeling and analysis tools, including Hspice, powerDC, powerSI, or other similar design tools. Experience with Matlab, Mathematica, HFSS will be added advantage. Problem solving ability to work through simulation issues, debug etc. Familiar with DC-DC converter technology and electromagnetic field theory. Preferred Qualifications: Good understanding on various droop mitigation schemes, Verilog level modeling, On-chip PDN and circuit techniques, PDN to timing correlation, CAD tools - Cadence Virtuoso, Spectre, Solid scripting skills in Python/tcl. Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research. Inside this Business Group The Client Computing Group (CCG) is responsible for driving business strategy and product development for Intel's PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, all in ones. Working with our partners across the industry, we intend to deliver purposeful computing experiences that unlock people's potential - allowing each person use our products to focus, create and connect in ways that matter most to them. As the largest business unit at Intel, CCG is investing more heavily in the PC, ramping its capabilities even more aggressively, and designing the PC experience even more deliberately, including delivering a predictable cadence of leadership products. As a result, we are able to fuel innovation across Intel, providing an important source of IP and scale, as well as help the company deliver on its purpose of enriching the lives of every person on earth. Posting Statement All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gende r, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Benefits We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits It has come to our notice that some people have received fake job interview letters ostensibly issued by Intel, inviting them to attend interviews in Intel's offices for various positions and further requiring them to deposit money to be eligible for the interviews. We wish to bring to your notice that these letters are not issued by Intel or any of its authorized representatives. Hiring at Intel is based purely on merit and Intel does not ask or require candidates to deposit any money. We would urge people interested in working for Intel, to apply directly at https://jobs.intel.com/ and not fall prey to unscrupulous elements. Working Model This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.
