MTS Silicon Design Engineer ( IP Verification Enigneer with 7+Yrs of exp )
Advanced Micro Devices
- Bangalore, Karnataka
- Permanent
- Full-time
- Developing functional coverage & assertions.
- Own the DFT DV sign-off and ensure a bug free design
- Collaborate with the Arch, Design, Functional DV, Emulation, Platform Debug, etc teams to comprehend and validate all the usage models
- Work with the post-silicon team on debug support and to help root-cause any failures
- 8-10 years of Design Verification experience with strong Verilog, System Verilog, C++ and UVM/OVM knowledge
- Good understanding and exposure to SoC design and architecture
- Thorough understanding of verification environments including need, methodology, stimulus, checkers, scoreboards, coverage aspects * • Ability to come with detailed testplan based on the Arch specs
- Exposure to DFT concepts such as JTAG, SCAN, MBIST, BScan, etc
- Comfortable with VCS/Verdi and excellent debug skills
- Logical in thinking and ability to gel well within a team and be a proactive member of the team.
- Good communication and leadership skills
- Continuously drive methodology improvements to improve efficiency
- Mentor junior engineers to build a high performing team
- Proficient in sub-system/IP level ASIC verification
- Proficient in debugging firmware and RTL code using simulation tools
- Proficient in using UVM testbenches and working in Linux and Windows environments
- Experienced with Verilog, System Verilog, C, and C++
- Graphics pipeline knowledge
- Developing UVM based verification frameworks and testbenches, processes and flows
- Automating workflows in a distributed compute environment.
- Exposure to simulation profile, efficiency improvement, acceleration, HLS tools/process
- Strong background in the C++ language, preferably on Linux with exposure to Windows platform
- Good understanding and hands-on experience in the UVM concepts and SystemVerilog language
- Good working knowledge of SystemC and TLM with some related experience.
- Scripting language experience: Perl, Ruby, Makefile, shell preferred.
- Exposure to leadership or mentorship is an asset
- Desirable assets with prior exposure to video codec system or other multimedia solutions.
- Bachelors or Masters degree in computer engineering/Electrical Engineering with 8-10 years of industry experience successfully delivering complex IP subsystems