Senior Staff Engineer - RTL Design
Marvell View all jobs
- Pune, Maharashtra
- Permanent
- Full-time
- Work on micro-architecture and register specification for IP and Subsystem.
- Implement a specification using RTL coding techniques and best practices
- Work with third party vendors to define customization requirements of third party IPs
- Work with the physical design teams, reviewing and providing guidance in floorplanning, power analysis, synthesis and timing signoff.
- Work with the verification team on pre-silicon verification tasks such as reviewing the verification test plans, coverage analysis, full-chip simulation and emulation, performance and power analysis and debug
- Help develop and/or evaluate design and verification methodologies and participate in improving existing ones
- Collaborate with and provide guidance to the post silicon and software teams for silicon bring up and performance tuning
- Bachelor’s degree in Computer Science, Electrical Engineering or related fields and 15+ years of related professional experience.
- Master’s degree and/or PhD in Computer Science, Electrical Engineering or related fields with 13+ years of experience.
- Experience in creating architectural, micro-architectural, and register specifications.
- Verilog/System Verilog RTL coding with System Verilog assertions
- Well-versed in all stages of the ASIC design flow (including specification, architecture and design implementation, prototype bring-up)
- Has worked on complex IP or ARM or RISC V based Processor Subsystem Design.
- Understanding on Caliptra and Hardware Security Standards is preferred
- Expertise in any of the following domains would be a big plus: networking, embedded systems architecture, computer architecture.
- Experience with scripting in Perl/Python/Shell