
Senior Digital Design Engineer
- Bangalore, Karnataka
- Permanent
- Full-time
- Job Responsibilities
- Translate the design specification to an optimal micro-architecture for digital blocks
- RTL coding using Verilog and System Verilog
- Meet power, performance and area goals by micro-architecture optimization
- Block level Designer verification
- Work closely with DV team to develop test-plans
- Front end implementation – Lint/CDC , synthesis, Timing constraint development
- Work closely with DFT and PD teams for signoff
- Support Silicon validation
- Position requirements
- BE/BS/Mtech/M.E/PhD degree in Electrical/Electronics/Computer science from a reputed institute
- 3-10 years of relevant experience
- Digital logic design and hands-on RTL coding experience, simulation, debug
- Experience in writing and debugging timing constraints at block and full-chip level
- Experience in Synthesis and LEC
- Good verbal and written communication skills to work effectively with teams spread geographically
- Experience in digital signal processing and Matlab modeling is highly desirable
- Experience in Processor subsystem design /SOC is a plus