Senior Design Engineer- Physical Design
Blaize
- Hyderabad, Telangana
- Permanent
- Full-time
5+ years of relevant experience
REQUIRED KNOWLEDGE, SKILLS, AND ABILITIES
- Work experience with node 5nm or lower node designs with advanced low power techniques is must.
- Experience on ASIC Physical Design: Floorplanning, P&R, extraction, IR Drop Analysis, Timing and
- Well versed with Cadence or Synopsys tools is important.
- Experience with Static Timing Analysis in Primetime or Primetime-SI is important.
- Hands-on experience in scripting languages such as PERL, TCL is important.
- Implement robust clock distribution solutions using appropriate methods that meet design
- Make good independent technical trade-offs between power, area, and timing (PPA).
- Interact with Design team to help drive and resolve design issues related to PnR closure.
- Timing closure on high-speed interfaces is a plus.
- Knowledge on Full chip Physical Design is beneficial.
- Good ASIC fundamentals and problem-solving skills is preferred.
- Experience with 5nm node.
- Experience with Cadence Innovus.
HyderabadBlaize is an equal opportunity employer. We pride ourselves on having a diverse workforce and we do not discriminate against any employee or applicant because of race, creed, color, religion, gender, sexual orientation, gender identity/expression, national origin, disability, age, genetic information, veteran status, marital status, pregnancy or related condition, or any other basis protected by law. We respect the gender, gender identity and gender expression of our applicants and employees, and we honor requests for preferred pronouns. It is our policy to comply with all applicable national, state and local laws pertaining to nondiscrimination and equal opportunity