
Emulation Engineer
- India
- Permanent
- Full-time
- Conduct detailed studies of chip architecture and micro-architecture to define, develop, and execute comprehensive pre-silicon test plans that thoroughly validate switch features.
- Verify the design, architecture, and micro-architecture using emulation platforms.
- Develop sub-system and chip-level tests using Tcl, ITcl, Python, and C/C++ to verify networking switch chips in emulation platforms.
- Build and synthesize Verilog/SystemVerilog-based models for emulation platforms such as Zebu or Palladium.
- Perform block, sub-system and chip/system-level debugging and root cause analysis for hardware and software issues, addressing pre-silicon challenges.
- Develop and optimize automation scripts and emulation methodologies to improve efficiency, reusability, and coverage.
- Create reusable synthesizable design blocks, libraries, and verification components to streamline emulation processes.
- Build and maintain robust emulation environments that support a global user community.
- Collaborate closely with Architecture, Micro-Architecture, Design, DV, and Software teams to achieve comprehensive verification coverage and smooth project execution.
- Ability to define verification scope and contribute to the development of verification infrastructure for networking switches.
- Experience collaborating with architects, designers, and software engineers to achieve verification goals.
- Bachelor’s degree with 12+ years in pre-silicon verification/emulation of networking ASICs.
- Strong expertise in Verilog/SystemVerilog, C/C++, Tcl, Python, and scripting for automation.
- Hands-on experience with emulation platforms (Zebu, Palladium), traffic generators (IXIA, Spirent), and high-speed interface protocols (e.g., PCIe, Ethernet) is desirable.
- Strong debugging skills and familiarity with DPI transactors, assertions, and coverage-driven verification.
- Verification engineers with simulation backgrounds are also encouraged to apply — strong verification fundamentals are highly valued.
- Experience in constraint random verification, assertion writing, coverage analysis, and debugging is a plus.
- Excellent communicator who thrives in a collaborative, fast-paced environment.